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Jenn

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  1. I gave up on my attempt at upper case register names. It's something to consider however, as applications such as Microchip's "Application Maestro" generate C source code with all caps for their registers.
  2. Hi Russ: The include file is PIC16F690.h and it is where the registers are defined. I wanted to use UPPER CASE registers for variable names instead of lower case variables, maybe I'm asking too much. Jenn It looks like registers used internally by the compiler get defined with upper case names 'behind the scenes' so the linker ends up seeing multiple defininitions if you try to declare them too. You should be able to use code of the form: volatile unsigned char status@ 0x03; #define STATUS status for the variables that throw this error. Orin. Thank you Orin ! So far the compiler looks just wonderful and I'm wondering if I really need to worry about the upper/lower case thing and just go with the flow.
  3. Hi Russ: The include file is PIC16F690.h and it is where the registers are defined. I wanted to use UPPER CASE registers for variable names instead of lower case variables, maybe I'm asking too much. Jenn
  4. I want to use all CAPS for my registers variables instead of lower case. I tried to upload my source files but this board will not let me. Here is the error message: -------------------------------------------------------------------------------------------------------------- Executing: "C:\Program Files\SourceBoost\boostc.pic16.exe" jenntest1.c -O1 -W1 -t 16F690 BoostC Optimizing C Compiler Version 6.81 (for PIC16 architecture) http://www.sourceboost.com Copyright© 2004-2007 Pavel Baranov Copyright© 2004-2007 David Hobday Licensed to Jenn Jacobsen under Single user Pro License for 1 node(s) Limitations: PIC12,PIC16 max code size:Unlimited, max RAM banks:Unlimited jenntest1.c success Executing: "C:\Program Files\SourceBoost\boostlink.pic.exe" "C:\Jenn\Luna\test\jenntest1.obj" -O1 -p "LunaTest1" -t 16F690 BoostLink Optimizing Linker Version 6.81 http://www.sourceboost.com Copyright© 2004-2007 Pavel Baranov Copyright© 2004-2007 David Hobday Optimisation level:1 Error: Duplicate global var:STATUS Error: Duplicate global var:INDF Error: Duplicate global var:FSR Error: Duplicate global var:PCL Error: Duplicate global var:PCLATH failure BUILD SUCCEEDED: Wed Jan 16 09:49:03 2008 ------------------------------------------------------------ The C code: #include <system.h> #pragma CLOCK_FREQ 8000000 // 8 mhz #pragma OPTIMIZE "a" void init_pic(void); void active(void); void main(void){ init_pic(); STATUS=0x08; }; void init_pic(void) { OSCCON=0X71; PORTC=0X00; TRISC=0X00; ANSEL=0X00; ANSELH=0X00; return; }; ---------------------------------------------------------------------------------------------------------------------------------------------------- Here is the modified include file: // // Jenn's PIC16f690 include file forMicrochip 16F690 // on a low pin count PicKit2 // ////////////////////////////////////////////////////////////// // Define Special function registers // // ............................................ // bank 0 // volatile unsigned char INDF @ 0x00; volatile unsigned char TMR0 @ 0x01; volatile unsigned char PCL @ 0x02; volatile unsigned char STATUS @ 0x03; volatile unsigned char FSR @ 0x04; volatile unsigned char PORTA @ 0x05; volatile unsigned char PORTB @ 0x06; volatile unsigned char PORTC @ 0x07; // N/C @ 0x08; // N/C @ 0x09; volatile unsigned char PCLATH @ 0x0A; volatile unsigned char INTCON @ 0x0B; volatile unsigned char PIR1 @ 0x0C; volatile unsigned char PIR2 @ 0x0D; volatile unsigned char TMR1L @ 0x0E; volatile unsigned char TMR1H @ 0x0F; volatile unsigned char T1CON @ 0x10; volatile unsigned char TMR2 @ 0x11; volatile unsigned char T2CON @ 0x12; volatile unsigned char SSPBUF @ 0x13; volatile unsigned char SSPCON @ 0x14; volatile unsigned char CCPR1L @ 0x15; volatile unsigned char CCPR1H @ 0x16; volatile unsigned char CCP1CON @ 0x17; volatile unsigned char RCSTA @ 0x18; volatile unsigned char TXREG @ 0x19; volatile unsigned char RCREG @ 0x1A; // N/C @ 0x1B; volatile unsigned char PWM1CON @ 0x1C; volatile unsigned char ECCPAS @ 0x1D; volatile unsigned char ADRESH @ 0x1E; volatile unsigned char ADCON0 @ 0x1F; // //..................................................... // bank 1 // // INDF SAME AS 0X00 @ 0x80; volatile unsigned char OPTION_REG @ 0x81; //volatile unsigned char PCL @ 0x82; //volatile unsigned char STATUS @ 0x83; //volatile unsigned char FSR @ 0x84; volatile unsigned char TRISA @ 0x85; volatile unsigned char TRISB @ 0x86; volatile unsigned char TRISC @ 0x87; // N/C @ 0x88; // N/C @ 0x89; // PCLATH SAME AS OXOA @ 0x8A; //volatile unsigned char INTCON @ 0x8B; volatile unsigned char PIE1 @ 0x8C; volatile unsigned char PIE2 @ 0x8D; volatile unsigned char PCON @ 0x8E; volatile unsigned char OSCCON @ 0x8F; volatile unsigned char OSCTUNE @ 0x90; // N/C @ 0x91; volatile unsigned char PR2 @ 0x92; volatile unsigned char SSPADD @ 0x93; //Sync serial port (I2C mode) address register volatile unsigned char SSPMASK @ 0x93; volatile unsigned char SSPSTAT @ 0x94; volatile unsigned char WPUA @ 0x95; volatile unsigned char IOCA @ 0x96; volatile unsigned char WDTCON @ 0x97; volatile unsigned char TXSTA @ 0x98; volatile unsigned char SPBRG @ 0x99; volatile unsigned char SPRRGH @ 0x9A; volatile unsigned char BAUDCTL @ 0x9B; // N/C @ 0x9C; // N/C @ 0x9D; volatile unsigned char ADRESL @ 0x9E; volatile unsigned char ADCON1 @ 0x9F; // //..................................................... // bank 2 // // INDF SAME AS 0x000; @ @ 0x100; //volatile unsigned char EEDAT @ 0x101; //volatile unsigned char EEADRL @ 0x103; //volatile unsigned char EECON1 @ 0x104; //volatile unsigned char EEDAT @ 0x105; //volatile unsigned char EEADRL @ 0x106; //volatile unsigned char EECON1 @ 0x107; //volatile unsigned char EEDAT @ 0x108; //volatile unsigned char EEADRL @ 0x109; //volatile unsigned char EECON1 @ 0x10A; //volatile unsigned char EEDAT @ 0x10B; //volatile unsigned char EEADRL @ 0x10C; //volatile unsigned char EECON1 @ 0x10D; //volatile unsigned char EEDAT @ 0x10E; //volatile unsigned char EEADRL @ 0x10F; // N/C @ 0x110; // N/C @ 0x111; // N/C @ 0x112; // N/C @ 0x113; // N/C @ 0x114; volatile unsigned char WPUB @ 0x115; volatile unsigned char IOCB @ 0x116; // N/C @ 0x117; //volatile unsigned char VRCON @ 0x118; //volatile unsigned char CM1CON0 @ 0x119; //volatile unsigned char CM2CON0 @ 0x11A; //volatile unsigned char CM2CON1 @ 0x11B; // N/C @ 0x11C; // N/C @ 0x11D; volatile unsigned char ANSEL @ 0x11E; volatile unsigned char ANSELH @ 0x11F; // //..................................................... // bank 3 // //volatile unsigned char VRCON @ 0x180; //volatile unsigned char CM1CON0 @ 0x181; //volatile unsigned char CM2CON0 @ 0x182; //volatile unsigned char CM2CON1 @ 0x183; //volatile unsigned char VRCON @ 0x184; //volatile unsigned char CM1CON0 @ 0x185; //volatile unsigned char CM2CON0 @ 0x186; //volatile unsigned char CM2CON1 @ 0x187; //volatile unsigned char VRCON @ 0x188; //volatile unsigned char CM1CON0 @ 0x189; //volatile unsigned char CM2CON0 @ 0x18A; //volatile unsigned char CM2CON1 @ 0x18B; //volatile unsigned char VRCON @ 0x18C; //volatile unsigned char CM1CON0 @ 0x18D; // N/C @ 0x18E; // N/C @ 0x18F; // N/C @ 0x190; // N/C @ 0x191; // N/C @ 0x192; // N/C @ 0x193; // N/C @ 0x194; // N/C @ 0x195; // N/C @ 0x196; // N/C @ 0x197; // N/C @ 0x198; // N/C @ 0x199; // N/C @ 0x19A; // N/C @ 0x19B; // N/C @ 0x19C; volatile unsigned char PSTRCON @ 0x19D; volatile unsigned char SRCON @ 0x19E; // N/C @ 0x19F; // //...................................................... //...................................................... // // ////////////////////////////////////////////////////////////////// // Define bits // #define PS0 OPTION_REG.0 #define PS1 OPTION_REG.1 #define PS2 OPTION_REG.2 #define PSA OPTION_REG.3 #define T0SE OPTION_REG.4 #define T0CS OPTION_REG.5 #define INTEDG OPTION_REG.6 #define RAPU OPTION_REG.7 //STATUS reg #define C STATUS.0 #define DC STATUS.0 #define Z STATUS.1 #define PD STATUS.2 #define TO STATUS.3 #define RP0 STATUS.4 #define RP1 STATUS.5 #define IRP STATUS.6; //TRISA reg #define TRISA0 TRISA.0 #define TRISA1 TRISA.1 #define TRISA2 TRISA.2 #define TRISA3 TRISA.3 #define TRISA4 TRISA.4 #define TRISA5 TRISA.5 //TRISB reg #define TRISB4 TRISB.0 #define TRISB5 TRISB.1 #define TRISB6 TRISB.2 #define TRISB7 TRISB.3 //TRISC reg #define TRISC0 TRISC.0 #define TRISC1 TRISC.1 #define TRISC2 TRISC.2 #define TRISC3 TRISC.3 #define TRISC4 TRISC.4 #define TRISC5 TRISC.5 #define TRISC6 TRISC.6 #define TRISC7 TRISC.7 //INTCON reg #define RABIF INTCON.0 #define INTF INTCON.1 #define T0IF INTCON.2 #define RABIE INTCON.3 #define INTE INTCON.4 #define T0IE INTCON.5 #define PEIE INTCON.6 #define GIE INTCON.7 //PIE1 reg #define TMR1IE PIE1.0 #define TMR2IE PIE1.1 #define CCP1IE PIE1.2 #define SSPIE PIE1.3 #define TXIE PIE1.4 #define RCIE PIE1.5 #define ADIE PIE1.6 //PIE2 reg #define EEIE PIE2.4 #define C1IE PIE2.5 #define C2IE PIE2.6 #define OSFIE PIE2.7 //PCON reg #define BOR PCON.0 #define POR PCON.1 #define SBOREN PCON.2 #define ULPWUE PCON.3 //OSCCON reg #define SCS OSCCON.0 #define LTS OSCCON.1 #define HTS OSCCON.2 #define OSTS OSCCON.3 #define IRCF0 OSCCON.4 #define IRCF1 OSCCON.5 #define IRCF2 OSCCON.6 //OSCTUNE reg #define TUN0 OSCTUNE.0 #define TUN1 OSCTUNE.1 #define TUN2 OSCTUNE.2 #define TUN3 OSCTUNE.3 #define TUN4 OSCTUNE.4 //SSPMSK reg #define MSK0 SSPMSK.0 #define MSK1 SSPMSK.1 #define MSK2 SSPMSK.2 #define MSK3 SSPMSK.3 #define MSK4 SSPMSK.4 #define MSK5 SSPMSK.5 #define MSK6 SSPMSK.6 #define MSK7 SSPMSK.7 //SSPSTAT reg #define BF SSPSTAT.0 #define UA SSPSTAT.1 #define R/W SSPSTAT.2 #define S SSPSTAT.3 #define P SSPSTAT.4 #define D/A SSPSTAT.5 #define CKE SSPSTAT.6 #define SMP SSPSTAT.7 //WPUA reg #define WPUA0 WPUA.0 #define WPUA1 WPUA.1 #define WPUA2 WPUA.2 #define WPUA4 WPUA.3 #define WPUA5 WPUA.4 //IOCA reg #define IOCA0 IOCA.0 #define IOCA1 IOCA.0 #define IOCA2 IOCA.0 #define IOCA3 IOCA.0 #define IOCA4 IOCA.0 #define IOCA5 IOCA.0 //WDTCON reg #define SWDTEN WDTCON.0 #define WDTPS0 WDTCON.1 #define WDTPS1 WDTCON.2 #define WDTPS2 WDTCON.3 #define WDTPS3 WDTCON.4 //TXSTA reg #define TX9D TXSTA.0 #define TRMT TXSTA.1 #define BRGH TXSTA.2 #define SENDB TXSTA.3 #define SYNC TXSTA.4 #define TXEN TXSTA.5 #define TX9 TXSTA.6 #define CSRC TXSTA.7 //SPBRG reg #define BRG0 SPBRG.0 #define BRG1 SPBRG.1 #define BRG2 SPBRG.2 #define BRG3 SPBRG.3 #define BRG4 SPBRG.4 #define BRG5 SPBRG.5 #define BRG6 SPBRG.6 #define BRG7 SPBRG.7 //SPBRGH reg #define BRG8 SPBRG.0 #define BRG9 SPBRG.1 #define BRG10 SPBRG.2 #define BRG11 SPBRG.3 #define BRG12 SPBRG.4 #define BRG13 SPBRG.5 #define BRG14 SPBRG.6 #define BRG15 SPBRG.7 //BAUDCTL reg #define ABDEN BAUDCTL.0 #define WUE BAUDCTL.1 #define BRG16 BAUDCTL.2 #define SCKP BAUDCTL.3 #define RCIDL BAUDCTL.4 #define ABDOVF BAUDCTL.5 //ADCON1 reg #define ADCS0 ADCON1.0 #define ADCS1 ADCON1.1 #define ADCS2 ADCON1.2 //PORTA reg #define RA0 PORTA.0 #define RA1 PORTA.1 #define RA2 PORTA.2 #define RA3 PORTA.3 #define RA4 PORTA.4 #define RA5 PORTA.5 //PORTB reg #define RB4 PORTB.0 #define RB5 PORTB.1 #define RB6 PORTB.2 #define RB7 PORTB.3 //PORTC reg #define RC0 PORTC.0 #define RC1 PORTC.1 #define RC2 PORTC.2 #define RC3 PORTC.3 #define RC4 PORTC.4 #define RC5 PORTC.5 #define RC6 PORTC.6 #define RC7 PORTC.7 //EEDAT reg #define EEDAT0 EEDAT.0 #define EEDAT1 EEDAT.1 #define EEDAT2 EEDAT.2 #define EEDAT3 EEDAT.3 #define EEDAT4 EEDAT.4 #define EEDAT5 EEDAT.5 #define EEDAT6 EEDAT.6 #define EEDAT7 EEDAT.7 //EEADR reg #define EEADR0 EEADR.0 #define EEADR1 EEADR.1 #define EEADR2 EEADR.2 #define EEADR3 EEADR.3 #define EEADR4 EEADR.4 #define EEADR5 EEADR.5 #define EEADR6 EEADR.6 #define EEADR7 EEADR.7 //WPUB // N/C .0 // N/C .1 // N/C .2 // N/C .3 #define WPUB4 WPUB.4 #define WPUB5 WPUB.5 // .6 // .7 //IOCB reg // N/C .0 // N/C .1 // N/C .2 // N/C .3 #define IOCB4 IOCB.4 #define IOCB5 IOCB.5 #define IOCB6 IOCB.6 #define IOCB7 IOCB.7 //VRCON reg #define VR0 VRCON.0 #define VR1 VRCON.1 #define VR2 VRCON.2 #define VR3 VRCON.3 #define VP6EN VRCON.4 #define VRR VRCON.5 #define C2VREN VRCON.6 #define C1VREN VRCON.7 //CM1CON0 reg #define C1CH0 CM1CON0.0 #define C1CH1 CM1CON0.1 #define C1R CM1CON0.2 // N/C CM1CON0.3 #define C1POL CM1CON0.4 #define C1OE CM1CON0.5 #define C1OUT CM1CON0.6 #define C1ON CM1CON0.7 //CM2CON0 reg #define C2CH0 CM2CON0.0 #define C2CH1 CM2CON0.1 #define C2R CM2CON0.2 // N/C CM2CON0.3 #define C2POL CM2CON0.4 #define C2OE CM2CON0.5 #define C2OUT CM2CON0.6 #define C2ON CM2CON0.7 //CM2CON1 reg #define C2SYNC CM2CON1.0 #define T1GSS CM2CON1.1 // N/C CM2CON1.2 // N/C CM2CON1.3 // N/C CM2CON1.4 // N/C CM2CON1.5 #define MC2OUT CM2CON1.6 #define MC1OUT CM2CON1.7 // ANSEL reg #define ANS0 ANSEL.0 #define ANS1 ANSEL.1 #define ANS2 ANSEL.2 #define ANS3 ANSEL.3 #define ANS4 ANSEL.4 #define ANS5 ANSEL.5 #define ANS6 ANSEL.6 #define ANS7 ANSEL.7 // ANSELH reg #define ANS8 ANSELH.0 #define ANS9 ANSELH.1 #define ANS10 ANSELH.2 #define ANS11 ANSELH.3 // N/C ANSELH.4 // N/C ANSELH.5 // N/C ANSELH.6 // N/C ANSELH.7 // Bits 2-0 Oscillator selection bits //define FOSC 0x3FFF // 111=RC oscillator // 0x3FFE // 110=RCIO oscillator // 0x3FFD // 101=INTOSC oscillator // 0x3FFC // 100=INTOSCIO oscillator // 0x3FFB // 011=EC // 0x3FFA // 010=HS oscillator // 0x3FF9 // 001=XT oscillator // 0x3FF8 // 000=LP oscillator
  5. I'm sure this is a bug as I took out the def's in my program and it linked fine. Then I tried: y=STATUS; and got an error "error: unknown identifier 'STATUS'" Somehow somewhere those 4 registers are being defined or at least the compiler/linker thinks they are. We should be able to build out own .h files with all caps for the vars.
  6. Here is the .c file: ///////////////////////////////////////////////////////////////////////////////////// // For a PIC 16F690 //outputs to the LEDS on the PicKit2 low count board #include <system.h> #pragma CLOCK_FREQ 8000000 // 8 mhz #pragma OPTIMIZE "a" //#pragma DATA _CONFIG, _XT_OSC & _WDT_OFF & _CP_OFF & _PWRTE_OFF void init_pic(void); void main(void){ unsigned char x; init_pic(); for(x=0;x<4;x++) { // portc=x; PORTC=x; delay_ms(50); // REMOVED FOR DEBUG ONLY wait for a while }; }; void init_pic(void) { // osccon=0x71; // 8 mhz internal oscillator / // portc=0x00; //clear the C port // trisc=0x00; // port C tristate off (digital outputs) // ansel=0x00; // disable a/d converter and make a digital out // anselh=0x00; // " " " " OSCCON=0X71; PORTC=0X00; TRISC=0X00; ANSEL=0X00; ANSELH=0X00; return; }; ///////////////////////////////////////////////////////////////////////////////////////////// Here is the PIC16F690.h file // // Jenn's PIC16f690 include file forMicrochip 16F690 // on a low pin count PicKit2 board // ////////////////////////////////////////////////////////////// // Define Special function registers // // ............................................ // bank 0 // volatile unsigned char INDF @ 0x00; volatile unsigned char TMR0 @ 0x01; volatile unsigned char PCL @ 0x02; volatile unsigned char STATUS @ 0x03; volatile unsigned char FSR @ 0x04; volatile unsigned char PORTA @ 0x05; volatile unsigned char PORTB @ 0x06; volatile unsigned char PORTC @ 0x07; // N/C @ 0x08; // N/C @ 0x09; volatile unsigned char PCLATH @ 0x0A; volatile unsigned char INTCON @ 0x0B; volatile unsigned char PIR1 @ 0x0C; volatile unsigned char PIR2 @ 0x0D; volatile unsigned char TMR1L @ 0x0E; volatile unsigned char TMR1H @ 0x0F; volatile unsigned char T1CON @ 0x10; volatile unsigned char TMR2 @ 0x11; volatile unsigned char T2CON @ 0x12; volatile unsigned char SSPBUF @ 0x13; volatile unsigned char SSPCON @ 0x14; volatile unsigned char CCPR1L @ 0x15; volatile unsigned char CCPR1H @ 0x16; volatile unsigned char CCP1CON @ 0x17; volatile unsigned char RCSTA @ 0x18; volatile unsigned char TXREG @ 0x19; volatile unsigned char RCREG @ 0x1A; // N/C @ 0x1B; volatile unsigned char PWM1CON @ 0x1C; volatile unsigned char ECCPAS @ 0x1D; volatile unsigned char ADRESH @ 0x1E; volatile unsigned char ADCON0 @ 0x1F; // //..................................................... // bank 1 // // def in bank 0 INDF @ 0X80; volatile unsigned char OPTION_REG @ 0x81; //def in bank PCL @ 0x82; //def in bank 0 STATUS @ 0x83; //def in bank 0 FSR @ 0x84; volatile unsigned char TRISA @ 0x85; volatile unsigned char TRISB @ 0x86; volatile unsigned char TRISC @ 0x87; // N/C @ 0x88; // N/C @ 0x89; // def in bank 0 PCLATH @ 0x8A; //def in bank 0 INTCON @ 0x8B; volatile unsigned char PIE1 @ 0x8C; volatile unsigned char PIE2 @ 0x8D; volatile unsigned char PCON @ 0x8E; volatile unsigned char OSCCON @ 0x8F; volatile unsigned char OSCTUNE @ 0x90; // N/C @ 0x91; volatile unsigned char PR2 @ 0x92; volatile unsigned char SSPADD @ 0x93; //Sync serial port (I2C mode) address register volatile unsigned char SSPMASK @ 0x93; volatile unsigned char SSPSTAT @ 0x94; volatile unsigned char WPUA @ 0x95; volatile unsigned char IOCA @ 0x96; volatile unsigned char WDTCON @ 0x97; volatile unsigned char TXSTA @ 0x98; volatile unsigned char SPBRG @ 0x99; volatile unsigned char SPRRGH @ 0x9A; volatile unsigned char BAUDCTL @ 0x9B; // N/C @ 0x9C; // N/C @ 0x9D; volatile unsigned char ADRESL @ 0x9E; volatile unsigned char ADCON1 @ 0x9F; // //..................................................... // bank 2 // //def om bank 0 INDF @ 0x100; //def in bank 0 EEDAT @ 0x101; //def in bank 0 EEADRL @ 0x103; //def in bank 0 EECON1 @ 0x104; //def in bank 0 EEDAT @ 0x105; //def in bank 0 EEADRL @ 0x106; //def in bank 0 EECON1 @ 0x107; //def in bank 0 EEDAT @ 0x108; //def in bank 0 EEADRL @ 0x109; //def in bank 0 EECON1 @ 0x10A; //def in bank 0 EEDAT @ 0x10B; //def in bank 0 EEADRL ` @ 0x10C; //def in bank 0 EECON1 @ 0x10D; //def in bank 0 EEDAT @ 0x10E; //def in bank 0 EEADRL @ 0x10F; // N/C @ 0x110; // N/C @ 0x111; // N/C @ 0x112; // N/C @ 0x113; // N/C @ 0x114; volatile unsigned char WPUB @ 0x115; volatile unsigned char IOCB @ 0x116; // N/C @ 0x117; //def in bank 0 VRCON @ 0x118; //def in bank 0 CM1CON0 @ 0x119; //def in bank 0 CM2CON0 @ 0x11A; //def in bank 0 CM2CON1 @ 0x11B; // N/C @ 0x11C; // N/C @ 0x11D; volatile unsigned char ANSEL @ 0x11E; volatile unsigned char ANSELH @ 0x11F; // //..................................................... // bank 3 // //def in bank 0 VRCON @ 0x180; //def in bank 0 CM1CON0 @ 0x181; //def in bank 0 CM2CON0 @ 0x182; //def in bank 0 CM2CON1 @ 0x183; //def in bank 0 VRCON @ 0x184; //def in bank 0 CM1CON0 @ 0x185; //def in bank 0 CM2CON0 @ 0x186; //def in bank 0 CM2CON1 @ 0x187; //def in bank 0 VRCON @ 0x188; //def in bank 0 CM1CON0 @ 0x189; //def in bank 0 CM2CON0 @ 0x18A; //def in bank 0 CM2CON1 @ 0x18B; //def in bank 0 VRCON @ 0x18C; //def in bank 0 CM1CON0 @ 0x18D; // N/C @ 0x18E; // N/C @ 0x18F; // N/C @ 0x190; // N/C @ 0x191; // N/C @ 0x192; // N/C @ 0x193; // N/C @ 0x194; // N/C @ 0x195; // N/C @ 0x196; // N/C @ 0x197; // N/C @ 0x198; // N/C @ 0x199; // N/C @ 0x19A; // N/C @ 0x19B; // N/C @ 0x19C; volatile unsigned char PSTRCON @ 0x19D; volatile unsigned char SRCON @ 0x19E; // N/C @ 0x19F; // //......................................................
  7. Hi Dave I'm wondering why I can't replace the 16F690.h include file and define my register variables in all caps. It compiles with no errors but the linker throws, duplicate global definitions for STATUS, INDF, FSR, PCL I've only def'd them once.
  8. I did my email with my license and I did enter the key into SourceBoost Pro and it did install fine. Goodies.exe did not work and I don't know where the lib source code is.
  9. Hi Pavel: I purchased the Pro license and tried to use the key to unlock goodies.exe without success. I'm also wondering where the lib source code is. Also, wondering about the lower case register access. I know it's your standard but I wanted to make mine in all upper case. I created the replacement 16F690.h file and it compiled without an error but when it linked, it threw a duplicate global def error. These globals were defined somewhere elsewhere: STATUS,INDF,FSR,PCL Please tell me how to make all the register variables in upper case. thx
  10. I don't seem to be able to post new topics so: Subject: a couple of questions 1) I just bought the BoostC Pro compiler for Pic. I would like to get the plug-ins and goodies and I have tried both of them with my BoostC pro license key without any luck. Are they separate licenses? 2) The upper/lower case thing with registers is unique among Pic compilers. Microchip, HT, CCS, CC5X all use upper case for their defs of registers. Using upper case register defs makes the BoostC code more portable among Pic C compilers. I understand your lower case for variables and upper case for constants/defs philosophy as it applies to pure C applications, but embedded systerms are different animals. To this end, I tried making a new 16F690 include file with upper case variables. It compiles and succeeds just fine but the linker throws a "duplicate global declaration" for the STATUS,INDF, FSR, and PCL registers and I don't understand why since I only declared them once. My defs look like: volatile unsigned char PCL @ 0x82; volatile unsigned char STATUS @ 0x83; volatile unsigned char FSR @ 0x84;
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