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cdc49

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About cdc49

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  1. Hi, You can also have a look at Microchip device HID bootloader somewhere in the usb framework (part of the big Microchip application library). Very useful because no driver installation on pc side (hid = native support). Use it with -rb 0x1000. Source of pic and pc side software are in the archive. This bootloader replace the old one made by microchip and it works with 2550, 4550, 24FJ and pic32. Regards, Charles
  2. Cac001, Thanks for your comparison, it 's interesting. Here is the whole code that doesn't work as expected with a 18LF1220 chip (or 18F1220) : #include <system.h> #pragma CLOCK_FREQ 40000000 #pragma DATA _CONFIG1H, _IESO_OFF_1H & _FSCM_OFF_1H & _HSPLL_OSC_1H #pragma DATA _CONFIG2L, _PWRT_ON_2L & _BOR_OFF_2L & _BORV_27_2L #pragma DATA _CONFIG2H, _WDT_OFF_2H & _WDTPS_32K_2H #pragma DATA _CONFIG3H, _MCLRE_ON_3H #pragma DATA _CONFIG4L, _DEBUG_OFF_4L & _LVP_OFF_4L & _STVR_OFF_4L #pragma DATA _CONFIG5L, _CP0_OFF_5L & _CP1_OFF_5L #pragma DATA _CONFIG5H, _CPB_OFF_5H & _CPD_OFF_5H #pragma DATA _CONFIG6L, _WRT0_OFF_6L & _WRT1_OFF_6L #pragma DATA _CONFIG6H, _WRTC_OFF_6H & _WRTB_OFF_6H & _WRTD_OFF_6H #pragma DATA _CONFIG7L, _EBTR0_OFF_7L & _EBTR1_OFF_7L #pragma DATA _CONFIG7H, _EBTRB_OFF_7H void main() { trisa = 0; adcon1 = 0x7f; lata.0 = 1; while (1) { // erratic behaviour with 18LF1220 and stable 250Hz on RA0 with 18LF1320 or 18F1320 lata.0 ^= 1; delay_ms(2); } } And here is a workaround : Simply replace the delay_ms(2); by delay_10us(100); delay_10us(100); or don't use these chip at 10MIPS ! Yes, even the simplest code ... Regards, Charles
  3. This is dangerous code as lata is also modified in the ISR. This means that part the way through the assignment lata.0 = ~lata.0; the code could get interrupted. There maybe other problems too, this is just one that I easily notice. Typically this can be fixed by disabling interrupts for the critical section of code: intcon.GIE = 0; lata.0 = ~lata.0; intcon.GIE = 1; Regards Dave Dave, I have remove the lata code (It was added to see something) in the main loop and I have always the same problem. It makes me crazy. So I have rewritten the code for C18 and everything works perfectly. A quick test with a very simple code (no ISR, no timer0) : while(1) { lata.0 = ~lata.0; delay_ms(2); } Gives me a bad 2 kHZ unstable frequency with sourceboost. With C18 : 250 Hz stable as expected. So, there is a big trouble somewhere. I wil receive a 18F1320 (quite similar target) so, i will retry the first sourceboost code posted here and ... Regards Charles
  4. Hi, I use a 18lf1220 at 5 volts with a 10 Mhz crystal and a frequency meter on porta.1 This small piece of code works as expected with a short delay in the main loop, but if i try to add more code the ISR fails. V6.96 and 6.97RC gives same results. I also changed the config bit to something more human ! Where's the problem ? Please ... #include <system.h> #pragma CLOCK_FREQ 40000000 #pragma DATA _CONFIG1H, _HSPLL_OSC_1H & _FSCM_OFF_1H &_IESO_OFF_1H #pragma DATA _CONFIG2L, _PWRT_ON_2L & _BOR_OFF_2L & _BORV_27_2L #pragma DATA _CONFIG2H, _WDT_OFF_2H #pragma DATA _CONFIG3H, _MCLRE_ON_3H #pragma DATA _CONFIG4L, _LVP_OFF_4L /* //#pragma DATA _CONFIG1L, 00 #pragma DATA _CONFIG1H, 0x06 #pragma DATA _CONFIG2L, 0x08 #pragma DATA _CONFIG2H, 0x1e #pragma DATA _CONFIG3H, 0x80 //#pragma DATA _CONFIG3L, 0 #pragma DATA _CONFIG4L, 0x81 //#pragma DATA _CONFIG4H, 0 #pragma DATA _CONFIG5L, 0x03 #pragma DATA _CONFIG5H, 0xc0 #pragma DATA _CONFIG6L, 0x03 #pragma DATA _CONFIG6H, 0xe0 #pragma DATA _CONFIG7L, 0x03 #pragma DATA _CONFIG7H, 0x40 */ void interrupt(void) { // it timer 0 if (intcon.TMR0IF) { tmr0l = 232; // f=fosc/256/2/(256-232) lata.1 =~lata.1; intcon.TMR0IF = 0; } } void main() { trisa.0 = 0; trisa.1 = 0; adcon1 = 0x7f; lata.0 = 1; // init timer 0 t0con.T08BIT = 1; // timer 8 bits t0con.T0CS = 0; t0con.PSA = 0; t0con.T0PS0 = 1; // prescaler 1:256 t0con.T0PS1 = 1; t0con.T0PS2 = 1; intcon.TMR0IE = 1; // isr on tmr0l = 232; t0con.TMR0ON = 1; // start timer 0 intcon.GIE = 1; // allow IT while (1) { lata.0 = ~lata.0; delay_us(10); // -> GOOD output on a0 approx 45 kHz // output on a1 is 813Hz // delay_us(250); // Bad --> on a1 (35Mhz!!) } } Regards, Charles
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