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Aegis-tec

18fxxjxx Config Incorrect

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If you use a Microchip 18FxxJxx part you'll need to edit the .h file for the part you're using. The SourceBoost files are incorrect. The revised section is as follows:

 

// The following is an assignment of address values for all of the

// configuration registers for the purpose of table reads

 

#define _CONFIG1L 0x00003FF8

#define _CONFIG1H 0x00003FF9

#define _CONFIG2L 0x00003FFA

#define _CONFIG2H 0x00003FFB

#define _CONFIG3H 0x00003FFD

 

/////// CONFIG2L Options //////////////////////////////////////////////////

#define _IESO_OFF_2L 0x0000007F // Oscillator Switchover mode disabled

#define _IESO_ON_2L 0x000000FF // Oscillator Switchover mode enabled

#define _FCMEN_OFF_2L 0x000000BF // Fail-Safe Clock Monitor disabled

#define _FCMEN_ON_2L 0x000000FF // Fail-Safe Clock Monitor enabled

#define _FOSC2_INT_2L 0x000000FB // Default osc on POR is INTRC

#define _FOSC2_FOSC_2L 0x000000FF // Default osc on POR is INTRC

#define _OSC_HS_2L 0x000000FC // HS oscillator

#define _OSC_HSPLL_2L 0x000000FD // HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)

#define _OSC_EC_2L 0x000000FE // EC oscillator, CLKO function on RA6

#define _OSC_ECPLL_2L 0x000000FF // EC oscillator, CLKO function on RA6

 

It's Microchip's fault, not Sourceboost. This cost me some time. I hope this saves you the trouble.

 

Steve

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Aegis-tec,

 

The header files have been corrected in BoostC V6.50.

 

Regards

Dave

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