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Bit Field Support In Boostc

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This topic seems to keep popping up for me and i am sure many others

that use BoostC

 

Bit Fields are especially useful for doing CRC data manipulation as well

as saving room when using variables you know do not need a full 4 bits.

 

Related to this (i am guessing here), is bit/bool support expected in a

future release of BoostC?

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I agree. Better support for 1-bit values in general would help me a lot. Not sure exactly what you mean by bit/bool support, but I keep getting frustrated not being able to use a bit/bool in a struct or array.

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I agree.  Better support for 1-bit values in general would help me a lot.  Not sure exactly what you mean by bit/bool support, but I keep getting frustrated not being able to use a bit/bool in a struct or array.

 

i do not know if this is true or not but; it seems that bit is simply mapped to bool.

All the issues and warnings are exactly the same no matter which name you use.

 

i was supprised to find bit field support missing myself... i wonder if it exists in the

C++ compiler ...

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I'd also love to see some parallel set/clear/tests on consecutive bits merged, e.g.

bcf 0x70, 0
bcf 0x70, 1
...
bcf 0x70, 7

changed to

clrf 0x70

and

btfsc 0x70, 0
goto label
btfsc 0x70, 1
goto label
...
btfsc 0x70, 7
goto label

changed to

movf 0x70, 1
btfss status, Z
goto label

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This topic seems to keep popping up for me and i am sure many others

that use BoostC

 

Bit Fields are especially useful for doing CRC data manipulation as well

as saving room when using variables you know do not need a full 4 bits.

 

Related to this (i am guessing here), is bit/bool support expected in a

future release of BoostC?

 

I too would like to see bit fields work as defined by ANSI C. They are extremely useful to keep data structures compact. The pics are such nice bit bangers that they beg for bit field support :unsure: .

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I'd also love to see some parallel set/clear/tests on consecutive bits merged, e.g...

 

Can you provide original C code that generates such unoptimized assembly.

 

Regards,

Pavel

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I'd also love to see some parallel set/clear/tests on consecutive bits merged, e.g...

Can you provide original C code that generates such unoptimized assembly.

Certainly.

#include <system.h>

bit a, b, c, d, e, f, g, h;

void main(void) {
a = 0;
b = 0;
c = 0;
d = 0;
e = 0;
f = 0;
g = 0;
h = 0;

while (a || b || c || d || e || f || g || h);
}

For me with -Oa, this gives almost exactly the assembly I described. It matters how the compiler/linker allocate the bits, which is exactly why it's important for the compiler/linker to handle optimization (the programmer usually can't). Obviously this exact sequence is contrived, but similar cases pop up all the time. Sometimes the assignments are mixed in with other statements or don't affect the whole register.

 

This shouldn't be optimized with volatile bits, but maybe a similar case should:

a = b = c = d = e = f = g = h = 0;

That sort of indicates that it should all be one operation.

 

If I had to choose, though, I'd pick bit compatibility (arrays, structs, return types, maybe ptrs?) over bit optimization for now.

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