Jump to content
John S

Pic I2C Not Working After Esd Test

Recommended Posts

Hi,

Apologies first, cause this question is more about hardware I guess.

 

I have my PIC micro board working. But when I took it to EMC test, it failed on ESD.

On 8KV ESD the PIC freezes, but Watch timer RESETS the pic, which is good. BUT after the reset the I2C won't work. There is no activity on clk or data line. If I power cycle the board then I2C works again.

 

The two I2C slaves connected to PIC is held in reset for a while once PIC is reset, so it can't be the slave device.

 

Any solution?

 

Thanks

John

 

 

post-5543-0-91508200-1430836138_thumb.jpg

Edited by John S

Share this post


Link to post
Share on other sites

Hi John,

 

The I2C on the PIC is probably not the best in the world. Knowing what state it is in can be difficult.

 

Resets may not always do the same thing.

A POR (cold reset) may reset more registers than a WDT or BOR (warm reset).

 

After a WDT reset you could try toggling the SPEN to get the I2C state machine to reset properly

after looking at the RCON reg to see why you were reset.

 

You don't say what PIC you are using, but if you look at the errata sheet for the PIC18F4550

section 17 there is more info about the I2C which may be of help.

 

Cheers

 

Reynard

Share this post


Link to post
Share on other sites

Thanks Reynard for your reply.

 

Yes I read about the issues with I2C on PIC18F4550. The PIC I use is 18F67K22.

 

I tried toggling SPEN, still same. When I tried to initiate a START condition, bus collision pir2.BCL1IF is set. (no slaves on the bus, just a master).

 

Reset is occurred by watchdog timer cause code blocks at

while (!pir1.SSPIF);

 

Thanks

John

Share this post


Link to post
Share on other sites

Hi

 

 

An ESD test can wreck havoc in your I/O configurations (LATx, TRISx,...)

A number of config bits can come out of it changed..

 

After a WDT or BOR reset, refresh all your analog and digital I/O pin configurations, like you were on POR.

Also make sure you turn off/on all peripherals and refresh their configs.

Just my 2 cents....
Best regards
Jorge

Share this post


Link to post
Share on other sites

Hi John,

 

Are you handling the BCL1F interrupt and giving the START another poke.

 

If the START is aborted you will not get an SSPIF interrupt I would have thought.

 

Waiting for interrupts to occur is not a good idea. Causes blocking.

 

Interrupts are there to tell you when something has happened and not you having to ask.

 

Cheers

 

Reynard

Share this post


Link to post
Share on other sites

Jorge, i tried as you said but no luck, In fact this is what microchip recommended.

 

I managed to solve the issue with a power cycle circuit(pic attached) but it may be not 100% correct way of doing.

 

By setting the BOR to above 3V the circuit worked for me.

 

post-5543-0-48004900-1433243319_thumb.jpg

Thanks for all your input

 

John

Share this post


Link to post
Share on other sites

Hi

 

 

I never heard of latch-ups in a PIC, but they are a reallity in the CMOS world, maybe.....

There is a "brute force approach" you can try to recover from the ESD test, just reset all SFRs to their POR state.

 

 

Best regards

Jorge

Share this post


Link to post
Share on other sites

Your content will need to be approved by a moderator

Guest
You are commenting as a guest. If you have an account, please sign in.
Reply to this topic...

×   Pasted as rich text.   Paste as plain text instead

  Only 75 emoji are allowed.

×   Your link has been automatically embedded.   Display as a link instead

×   Your previous content has been restored.   Clear editor

×   You cannot paste images directly. Upload or insert images from URL.

Loading...

×